[llvm-dev] Question about quad-register

[陳韋任 via llvm-dev]

Hi All,

  If the target supports quad-register R0:R1:R2:R3 (Rn is 32-bit
register), is it possible mapping quad-register
to v4i32 so that the following example work?

    typedef int v4si __attribute__ ((vector_size (16)));

    void foo(v4si i) {
      v4si j = i;
    }

I don't know how to write CallingConv.td to represent the concept of
occupying quad-register R0:R1:R2:R3
once seeing v4i32. Any example that I can refer to?

Thanks.

Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Homepage: https://people.cs.nctu.edu.tw/~chenwj