[llvm-dev] Reaching definitions on Machine IR post register allocation

[Krzysztof Parzyszek via llvm-dev]

Hexagon has RDF that does exactly that.  At the moment it's under 
lib/Target/Hexagon, but it meant to be target-independent.  It won't 
work with X86 due to a known issue related to register units, but it 
should work fine for other targets.  See https://reviews.llvm.org/D29295 
about moving it to lib/CodeGen.

-Krzysztof

On 9/4/2017 9:00 AM, Raghavan, Venugopal via llvm-dev wrote:
> Hi,
> 
> Just to clarify I am looking for a whole machine function analysis not 
> just something restricted to within a machine basic block.
> 
> Thanks.
> 
> Regards,
> 
> Venu.
> 
> *From:* Raghavan, Venugopal
> *Sent:* Saturday, September 02, 2017 12:56 PM
> *To:* llvm-dev at lists.llvm.org
> *Subject:* Reaching definitions on Machine IR post register allocation
> 
> Hi,
> 
> Given a definition of a register by a machine instruction in the Machine 
> IR post register allocation, I would like to compute the set of uses of 
> this register reached by this definition.
> 
> Does LLVM already have this kind of analysis I can use? Otherwise, I 
> will have to implement a reaching definitions analysis which would be a 
> little involved since it would need to work on a non-SSA IR form.
> 
> If something already exists that would be very helpful for me.
> 
> Thanks.
> 
> Regards,
> 
> Venugopal Raghavan.
> 
> 
> 
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