[llvm-dev] How to match multiple DAG nodes

[Dominique Torette via llvm-dev]

This seems to work:

def       MOVSUTO_A_iSLo : CLPFPU_A_iSLo<0b1000001101,
                                                (ins IMM32Operand:$ImmA, FPUaOffsetOperand:$OffsetB),
                                                (outs ),
                                                [],
                                                "movsuto_a\t$ImmA,$OffsetB",
                                                [(store (i32 imm:$ImmA),(frameindex:$OffsetB))],NoItinerary> {

From: Dominique Torette
Sent: lundi 16 octobre 2017 17:17
To: llvm-dev at lists.llvm.org
Cc: Roel Jordans (r.jordans at tue.nl)
Subject: How to match multiple DAG nodes

Hi,

I'm trying to lower the following DAG fragment into a single MOV immediate value to an offset position of current frame (Offset register family) using DAG to instruction pattern.

[cid:image001.png at 01D346AB.06A53A80]

void test_assign_float() {
        volatile float res;
        res = 42.0;
}

SelectionDAG has 9 nodes:
          t0: ch = EntryToken
        t3: ch = lifetime.start t0, TargetFrameIndex:i16<0>
      t11: ch = store<Volatile ST4[%res]> t3, Constant:i32<1109917696>, FrameIndex:i16<0>, undef:i16
    t8: ch = lifetime.end t11, TargetFrameIndex:i16<0>
  t9: ch = CLPISD::RET_FLAG t8


In my pattern, I have to match multiple nodes: the store node, the Constant node and the FrameIndex node.


            def       MOVSUTO_A_iSLo : CLPFPU_A_iSLo<0b1000001101,
                                                (ins IMM32Operand:$ImmA, FPUaOffsetOperand:$OffsetB),
                                                (outs ),
                                                [],
                                                "movsuto_a\t$ImmA,$OffsetB",
                                                [(store (imm:$ImmA),(frameindex:$OffsetB))],NoItinerary> {

During TableGen, I got the following error:

MOVSUTO_A_iSLo:      (st (imm:{i16:i32:v2i16:v2i32}):$ImmA, (frameindex:iPTR):$OffsetB)<<P:Predicate_unindexedstore>><<P:Predicate_store>>
Included from /home/dte/Projects/CLP/clp-llvm/trunk/llvm-project/llvm/lib/Target/CLP/CLP.td:33:
/home/dte/Projects/CLP/clp-llvm/trunk/llvm-project/llvm/lib/Target/CLP/CLPInstrInfo.td:13772:2: error: In MOVSUTO_A_iSLo: Could not infer all types in pattern!
        def     MOVSUTO_A_iSLo : CLPFPU_A_iSLo<0b1000001101,
        ^
../../../bin/llvm-tblgen: 1 errors.

It is understood that the 'Constant' node will be matched by the default 'imm' pattern.
It seems that TableGen can't infer the type for ImmA, even if the operand is defined as is an i32, as per following definition:

def       IMM32Operand:Operand<i32> {
            let         ParserMatchClass= IMM32OperandClass;
}

What do I'have to add to remove the ambiguity on the ImmA type?
Is there a syntax to specify/coerce the data type of the Constant node in the pattern?
I'have guess/try some syntaxes using i32 types, but without success.










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Dominique Torette
System Architect
Rue des Chasseurs Ardennais - Liège Science Park - B-4031 Angleur
Tel: +32 (0) 4 361 81 11 - Fax: +32 (0) 4 361 81 20
www.spacebel.be<http://www.spacebel.be/>



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