[llvm-dev] Why am I getting FrameIndex:i64<0> when I have no i64's?

[Robert Baruch via llvm-dev]

Here's the IR I'm trying to compile for my backend, a 16-bit CPU:

; ModuleID = 'foo.c'
source_filename = "foo.c"
target datalayout =
"E-m:e-p16:16:16-i1:16:16-i8:16:16-i16:16:16-i32:16:16-i64:16:16-S16-n16"
target triple = "tms9900"

@global_var = common global i16 0, align 2

; Function Attrs: noinline nounwind optnone
define signext i16 @dothis(i16 signext %a) #0 {
entry:
  %a.addr = alloca i16, align 2
  store i16 %a, i16* %a.addr, align 2
  %0 = load i16, i16* @global_var, align 2
  %1 = load i16, i16* %a.addr, align 2
  %add = add nsw i16 %0, %1
  ret i16 %add
}

attributes #0 = { noinline nounwind optnone
"correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "less-precise-fpmad"="false"
"no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"
"no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}
!llvm.ident = !{!1}

!0 = !{i32 1, !"wchar_size", i32 2}
!1 = !{!"clang version 6.0.0 (trunk 315731) (llvm/trunk 316278)"}

So far, so good. Now, when I try to compile this:

build/bin/llc -march tms9900 -filetype=asm foo.bc -view-dag-combine1-dags
-debug -O0

...
Initial selection DAG: BB#0 'dothis:entry'
SelectionDAG has 17 nodes:
  t0: ch = EntryToken
  t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0
  t6: i64 = Constant<0>
  t8: ch = store<ST2[%a.addr]> t0, t2, FrameIndex:i64<0>, undef:i64
      t4: ch = CopyToReg t0, Register:i16 %vreg1, t2
    t13: ch = TokenFactor t4, t8
      t10: i16,ch = load<LD2[@global_var](dereferenceable)> t8,
GlobalAddress:i64<i16* @global_var> 0, undef:i64
      t11: i16,ch = load<LD2[%a.addr](dereferenceable)> t8,
FrameIndex:i64<0>, undef:i64
    t12: i16 = add nsw t10, t11
  t15: ch,glue = CopyToReg t13, Register:i16 %R5, t12
  t16: ch = TMS9900ISD::Ret t15, Register:i16 %R5, t15:1
...

Where are the i64's coming from?
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