[llvm-dev] Using single register class in Pat conversion in XXXInstrInfo.td

[Tom Stellard via llvm-dev]

On 05/15/2017 05:58 AM, vivek pandya via llvm-dev wrote:
> Hello LLVMDevs,
> 
> I have following two patterns :
> def : Pat<(selectcc (f32 GR32:$L), (f32 GR32:$R),
>                     (i32 GR32:$T), (i32 GR32:$F), SETOLT),
>           (Select_CC GR32:$T, GR32:$F, (FCMP_LT GR32:$L, GR32:$R), 1)>;
> def : Pat<(selectcc (f32 GR32:$L), (f32 GR32:$R),
>                     (f32 GR32:$T), (f32 GR32:$F), SETOLT),
>           (Select_CC GR32:$T, GR32:$F, (FCMP_LT GR32:$L, GR32:$R), 1)>;
> 
> but I want to write it to single pattern like 
> 
> Pat<(selectcc (f32 GR32:$L), (f32 GR32:$R),
>                     GR32:$T, GR32:$F, SETOLT),
>           (Select_CC GR32:$T, GR32:$F, (FCMP_LT GR32:$L, GR32:$R), 1)>;
> 
> GR32 is single register class used for i32/f32
> and what I want is if the comparison is between f32 values then generate FCMP , $T and $F can be i32/f32 but if I use above pattern table gen fails with "Could not infer all types in pattern"
> 
> How to write such pattern matching rule ?
> 

You should not use register classes in Pat definitions and should use
types instead, because instruction selection is based on types and
not registers.

I'm not sure there is a way to express these rules with just a single
pattern.

-Tom

> Sincerely,
> VIvek
> 
> 
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