[llvm-dev] Fulltime Job AD: Compiler engineer @ Xilinx (San Jose, CA)

[Hongbin Zheng via llvm-dev]

Xilinx, the leading company specialized in FPGA, is looking for talented
engineer to work on its LLVM-based OpenCL-to-FPGA compiler to ease FPGA
programming with improved productivity.

FPGA are reconfigurable MPSoC including CPU, GPU, reprogrammable logic and
various specific accelerators (video CODEC...) and I/O subsystems (100 GE,
PCI, memory buses...). This complexity makes them versatile systems that
can be used as accelerators but this also makes their use difficult
compared to simpler CPU-only environments.

This position offers the opportunity to design and implement of significant
parts of Xilinx's OpenCL compiler. You will get a chance to tackle many
interesting and challenging problems working on compiler for cutting-edge
FPGA hardware.

Preferred Qualifications:
Familiarity of LLVM/Clang
Familiarity with loop transformation and/or vectorization,
Familiarity with code generation from generic IR to target specific IR
(e.g. machine code)
Familiarity with building cost model at the compiler middle-end

Desired skills:

Knowledge of computer architecture， FPGA design with Verilog/VHDL is a plus
Experience with OpenCL or CUDA is a plus
Experience with Clang AST matcher and Clang tooling is a plus

We have two opening for this position

Please contact me directly if you have questions (hongbinz at xilinx.com)
or apply on
https://xilinx.taleo.net/careersection/2/jobdetail.ftl?job=73462&src=JB-10120
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