[llvm-dev] How parameter passing registers are used intelligently?

vivek pandya via llvm-dev llvm-dev at lists.llvm.org
Tue Jan 31 03:19:15 PST 2017

Hello LLVM Developers,

I need help to clear my understanding on register allocation.

For architecture like x86 LLVM does not add registers designated
for parameter passing to reserved registers.

For the function arguments
register allocation happens during ISel phase based on register usage

Now for each virtual register there is one assigned register class for
when it is created.

So AllocationOrder class can provide as a hint register which could have
used for parameter passing. But register allocators should be able to use
when they are free i.e not used for conventional usage.

So how does LLVM register allocators take care of such situations?
Please also suggest the location of the code which is responsible for such
if any.

Please correct my understanding if I am wrong.
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