[llvm-dev] Tweaking the Register Allocator's spill placement
Krzysztof Parzyszek via llvm-dev
llvm-dev at lists.llvm.org
Tue Jan 10 07:57:39 PST 2017
On 1/10/2017 9:43 AM, Johnson, Nicholas Paul via llvm-dev wrote:
> It seems that one could fix this before the fact, that is, discourage the register allocator from repeatedly choosing the same register (again assuming there are additional available registers). With luck, there would be fewer anti- and output-dependences because the adjacent live ranges would not share a common register.
> I imagine people have tried this and there is a good reason not to...
Breaking anti-dependencies can be quite complex if we want to do it
right (that is in a way that further improved to be as close to being
optimal as possible). Picking a different register during allocation can
only go so far. A post-RA scheduler (i.e. any post-RA scheduler) would
be a better candidate for that, since it is actually where such
dependencies can influence the outcome.
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