[llvm-dev] Problem ScheduleDAG on PowerPC, X86 works fine.
James Y Knight via llvm-dev
llvm-dev at lists.llvm.org
Tue Feb 7 12:15:12 PST 2017
That's seems really odd that ADDC/ADDE uses glue there, instead of a plain
The x86 backend has code that converts the glue into a value, which is why
it wasn't affected.... (LowerADDC_ADDE_SUBC_SUBE).
On Tue, Feb 7, 2017 at 2:48 PM, Amaury SECHET via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Long story short: https://llvm.org/bugs/show_bug.cgi?id=31890
> The backend fails to schedule a given DAG, the reason being that there is
> an instruction and it glue that needs to be broken apart as they can't be
> scheduled consecutively. See attached file for a picture of the DAG.
> Not sure what's the best course of action is, and not sure why this isn't
> a problem for the X86 backend either. I'm looking for advice on the best
> course of actions. As I see it, the option are:
> 1/ add extra logic in the DAGCombiner to make sure this doesn't happen. I
> don't see a way this could be done cheaply and overall I don't think this
> is the best option/
> 2/ Have the ScheduleDAG machinery detect this case and break up the glue,
> for instance via breaking up (adde X, Y, Carry) into (add (add X, Y)n (adde
> 0, 0, Carry)) or something alike when the situation present itself.
> 3/ Do whatever the X86 backend does, which I'm not sure what it is.
> Advice ?
> Thanks in advance,
> Amaury SECHET
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
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