[llvm-dev] Canonical way to handle zero registers?

[Akira Hatanaka via llvm-dev]

The function looks for "addiu $dst, $zero, 0" and tries to replace it with
$zero. I don't remember whether there was a reason this had to be done
after isel. It seems that you can just do it in DAGToDAGISel::Select.

On Sun, Dec 24, 2017 at 9:33 AM, Simon Dardis <Simon.Dardis at mips.com> wrote:

> Hi Sean,
>
> I didn't implement that particular functionality as it was before my time
> at MIPS, Akira (+cc) may recall the
> specifics why he took that approach.
>
> As far as I can see, the MIPS' approach pre-dates the AArch64 style
> approach which is also used by Lanai &
> RISCV as Alex highlights, so I believe it was a novel approach. It appears
> no other targets take this approach
> of a late SelectionDAG pass.
>
> Thanks,
> Simon
> ------------------------------
> *From:* Sean Silva [chisophugis at gmail.com]
> *Sent:* Sunday, December 24, 2017 4:43 AM
> *To:* Simon Dardis
> *Cc:* llvm-dev
> *Subject:* RE: [llvm-dev] Canonical way to handle zero registers?
>
> Thanks, that sounds like it would work. Was this based on what any other
> target did? Or do any other targets take this approach?
>
> I just want to make sure that we don't already have a hook suitable for
> this. Overriding runOnFunction to run what could be described as just a
> "late SelectionDAG pass" sounds pretty intrusive. Do you remember other
> approaches that didn't work?
>
> -- Sean Silva
>
> On Dec 22, 2017 2:17 PM, "Simon Dardis" <Simon.Dardis at mips.com> wrote:
>
>> Hi Sean,
>>
>> Have you looked at inheriting from llvm:SelectionDAGISel for your target,
>> invoking runOnMachineFunction to perform
>> ISEL, then post processing the output by finding the cases where -1 is
>> synthesized then used and replacing the uses
>> of the synthesized -1 with the register wired to -1?
>>
>> The MIPS backend takes this approach for dealing with the zero register,
>> see MipSEISelDAGToDAG.cpp for reference.
>>
>> Thanks,
>> Simon
>> ------------------------------
>> *From:* llvm-dev [llvm-dev-bounces at lists.llvm.org] on behalf of Sean
>> Silva via llvm-dev [llvm-dev at lists.llvm.org]
>> *Sent:* Friday, December 22, 2017 5:22 AM
>> *To:* llvm-dev
>> *Subject:* [llvm-dev] Canonical way to handle zero registers?
>>
>> I looked around the codebase and didn't see anything that obviously
>> looked like the natural place to turn constant zero immediates into
>> zero-registers (i.e. registers that always return zero when read). Right
>> now we are expanding them in ISelLowering::LowerOperation but that seems
>> too early.
>>
>> The specific issue I'm hitting is that we have a register that reads as
>> -1 and so when we replace -1 too early with this register, the standard
>> "not" pattern (xor x, -1) will fail to match to "not".
>>
>> Thanks,
>> Sean Silva
>>
>
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