[llvm-dev] About TableGen RangeList
Matt Arsenault via llvm-dev
llvm-dev at lists.llvm.org
Sun Apr 16 10:16:26 PDT 2017
> On Apr 15, 2017, at 20:35, Tim Northover via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> On 15 April 2017 at 19:52, 陳韋任 via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>> Okay, a little experiment shows the order matters.
> Interesting, thanks for reporting back. Personally I find it pretty
> scary that we support the second form at all. It's mixing two
> different endiannesses with no real indication of which one will win.
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
I recall seeing an option to control this in InstrInfo:
// Target can specify its instructions in either big or little-endian formats.
// For instance, while both Sparc and PowerPC are big-endian platforms, the
// Sparc manual specifies its instructions in the format [31..0] (big), while
// PowerPC specifies them using the format [0..31] (little).
bit isLittleEndianEncoding = 0;
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