[llvm-dev] Basic Backend: Load Indirect

[Gschwandtner Georg - S1310567008 via llvm-dev]

Hello Tim,

Thanks for rely.

 I tried for some days now, and still was not able to solve it. 

As you recommended, I tried removed the SelectAddrMode.

I took the LEG backend and only tried to change the LDR(LOAD from register + offset) instruction in to a register-only based instruction for now.   

I uploaded the code to github (https://github.com/ATSchorsch/llvm-leg/blob/master/lib/Target/LEG/LEGInstrInfo.td) . I tried to reduce the changes to a minimum in "LEGInstrInfo.td" and "LEGOperators.td".

The first try was to only change the LDR instruction and added an basic Load-Immidiate (LOADi) instruction. With this I got the following error when compiling a simple IR code:
------------------------
LLVM ERROR: Cannot select: 0xa66eb90: i32 = FrameIndex<2> [ID=7]
In function: main
---------------------------

My impression was that LLVM misses an instruction to load a address pointer. So I added LOADii that can load the address-pointer. With this change, I get the following error(full details see Error2.txt).
--------------------
*** Bad machine code: MBB exits via unconditional fall-through but ends with a barrier instruction! ***
- function:    main
- basic block: BB#0  (0xb06c4fc)
LLVM ERROR: Found 1 machine code errors.
------------------

My guess is that I fail to get the address correct, but i don't know how to fix this.

I am not sure if LOADii is really necessary or if it just covers something that has to done in the code somewhere else.

Can you give me a hint?

BR
Georg

________________________________________
Von: Tim Northover <t.p.northover at gmail.com>
Gesendet: Montag, 29. August 2016 02:20
An: Gschwandtner Georg - S1310567008
Cc: llvm-dev at lists.llvm.org
Betreff: Re: [llvm-dev] Basic Backend: Load Indirect

Hi Georg,

On 28 August 2016 at 10:24, Gschwandtner Georg - S1310567008 via
llvm-dev <llvm-dev at lists.llvm.org> wrote:
> ldr r5, r4 // load indirect from memory address in r4 to register
>
> [...]
>
> Does someone have a hint for me? I would very much appreciate it.

This CPU sounds simple enough that it won't need SelectAddrMode
functions at all. They're there mostly for targets with lots of
different possible ways to form an address with different trade-offs
in efficiency & size..

For you, an address has to be in a register, so you can probably just
write a TableGen pattern on the load instruction itself. Something
like:

   (set GPR:$Rd, (load GPR:$addr))

ought to work for the load.

Cheers.

Tim.
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