[llvm-dev] [AVX512BW] Nasty KAND issue

Cameron McInally via llvm-dev llvm-dev at lists.llvm.org
Thu Oct 20 08:54:38 PDT 2016


Hey guys,

I've hit a pretty nasty issue on SKX with ANDs of masks <= 4 bits.

In the IR, we represent a 4b vector mask as <4 x i1>. This assumes
that the storage container for this type is also 4b, but it's not. The
smallest mask register on SKX is 8b. This also implies that the
smallest load/store moves 8b.

We run into problems when we try to optimize ANDs (full test case attached):

  %r1 = and <4 x i1> %r0, <i1 -1, i1 -1, i1 -1, i1 -1>

At the IR level the all1s mask looks like the Identity for this
operation, so LLVM will remove it. But it is not the Identity since
this operation should clear the top 4 bits of the 8 bit hardware
register in play. E.g.

        kmovb   -4(%rsp), %k0
        kandb   %k0, %k1, %k0
        kmovb   %k0, -4(%rsp)

I began tracking down this issue and found that InstCombine will
incorrectly remove the AND. Then I noticed that the Reassociate pass
would also remove the AND if InstCombine did not. That made me
nervous. My current thinking is that this might be a larger problem
that shouldn't be patched up. Or maybe I made a faulty assumption with
the IR I choose for this operation.

Any help would be greatly appreciated.

Thanks,
Cam
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