[llvm-dev] LLVM backend -- Avoid base+index address mode for X86

[Hong Hu via llvm-dev]

Hi All,

I have a question regarding LLVM backend. I appreciate a lot if anyone can
provide some hints.

My work here is to avoid base+index address mode for X86 target, to allow
base-register only or index-register only address mode. For example,
"mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed.

I understand LLVM backend is a complex system. Can any one help point out
which subsystem I should look into to solve my question?

Regards,
Hu Hong
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