[llvm-dev] Generate Register Indirect mode instruction

[Alex Bradley via llvm-dev]

> If I understand correctly:
>
> %v1 = load i32, i32* %a
> %v2 = load i32, i32* %b
> %v3 = add i32 %v1, %v2
> store i32 %v3, i32* %c
>
> maps to (using invented mnemonics):
>
> ASSIGN R0, %a
> ASSIGN R1, %b
> ASSIGN R2, %c
> ADD *R2, *R0, *R1
>
> I.e. pattern
>   (store %c, (add (load %a), (load %b)))
> becomes
>   (ADD (ASSIGN R2, %c), (ASSIGN R0, %a), (ASSIGN R1, %b))
>

Yes. Exactly.

Regards,
Alex
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161014/ec8bee4f/attachment.html>