[llvm-dev] CUDA: instrumenting PTX code

Jingyue Wu via llvm-dev llvm-dev at lists.llvm.org
Fri Nov 18 11:31:54 PST 2016


On Fri, Nov 18, 2016 at 10:55 AM, Gurunath Kadam via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hi,
>
> I am not sure if there is any CUDA/PTX instrumenting feature in LLVM.
>
> I want to generated a simple memory trace and I know GPGPU Ocelot does
> that. But I was thinking why not LLVM.
>

> So I am looking at two optimizations implemented in LLVM for CUDA for some
> inspiration.
>
> 1. Address inference: Does this use PTX IR or LLVM IR? I would say LLVM IR
> based on some code keywords like PHI nodes etc.
>
> 2. Bypass slow div: This is a generic optimization done adopted for CUDA.
> I think it uses LLVM IR.
>

Both optimizations are IR-level.


>
> So my question is, to instrument PTX code, shall I focus on LLVM IR or PTX?
>

Depending on what you want to trace. For memory tracing, instrumenting IR
is probably enough, because there's an almost one-to-one mapping between a
load/store in optimized IR and a load/store in PTX.


>
> Some definite guidance on these lines will be very helpful. Thank you.
>
> Sincerely,
> Gurunath
>
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