[llvm-dev] 96 core Aarch64 cloud server for $0.50/hr

David Chisnall via llvm-dev llvm-dev at lists.llvm.org
Wed Nov 16 05:22:47 PST 2016

On 16 Nov 2016, at 12:32, Bruce Hoult via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> Interestingly, I failed in attempts to run 32 bit ARM code on the packet.net server. Even something as simple as the following (assembled and tested on a Pi) which I think should need no runtime support other than the kernel. It tried to run it, but segfaulted. Could it be that this is an Aarch64 *only* CPU? I haven't been able to find anything about this on the net.

Yes, the ThunderX doesn’t implement AArch32 (we have a couple of them).  They’re intended as a successor for Cavium’s multithreaded MIPS64 designs, so the intended customers don’t have any legacy ARM code or any legacy 32-bit code.


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