[llvm-dev] Is the correct behavior of getelementptr i192* for opt + llc -march=aarch64?

Mehdi Amini via llvm-dev llvm-dev at lists.llvm.org
Tue Nov 8 21:58:25 PST 2016


> On Nov 8, 2016, at 9:48 PM, MITSUNARI Shigeo via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi Tim,
> 
> -------------------------------------------
> % cat a.ll
> define void @store0_to_p4(i192* %p)
> {
>  %p1 = bitcast i192* %p to i64*                 ; (X)
>  %p2 = getelementptr i64, i64* %p1, i64 3       ; (X)
>  %p3 = getelementptr i64, i64* %p2, i64 1
>  store i64 0, i64* %p3
>  ret void
> }
> -------------------------------------------
> % opt-3.8 -O3 a.ll -S
> ; ModuleID = 'a.ll'
> 
> ; Function Attrs: norecurse nounwind
> define void @store0_to_p4(i192* nocapture %p) #0 {
>  %p21 = getelementptr i192, i192* %p, i64 1        ; (Y)
>  %p2 = bitcast i192* %p21 to i64*
>  %p3 = getelementptr i64, i64* %p2, i64 1
>  store i64 0, i64* %p3, align 4
>  ret void
> }
> 
> attributes #0 = { norecurse nounwind }
> -------------------------------------------
> 
>> This looks like it's because the IR doesn't contain a datalayout
>> declaration, which affects how i192 is interpreted (particularly
>> sizeof(i192) for GEP purposes).
> 
> I think that (X) != (Y) for aarch64, but I don't know how to provide
> a correct datalayout, then I will avoid using i192*.

That’s why I asked for the full repro by the way,  I though you were showing only part of the test case.

The datalayout is *required* if you want to perform any transformation on the IR, otherwise you may have some surprise like this at codegen time.
You should get it from the TargetMachine after you initialize a Target, and set it on the module from the beginning.

If you just want to play with some IR, you can look it up in the source code, or in the test directory:

$ git grep datalayout test/CodeGen/AArch64/
test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll:target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll:target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir:  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll:target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
… 


— 
Mehdi



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