[llvm-dev] Liveness of AL, AH and AX in x86 backend

Quentin Colombet via llvm-dev llvm-dev at lists.llvm.org
Wed May 25 12:22:02 PDT 2016

> On May 25, 2016, at 11:44 AM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:
> On 5/25/2016 12:35 PM, Quentin Colombet wrote:
>> Doing that would say that we override the other lanes of EAX, which is
>> not what we want. In what cases, do we need to add those implicit arguments?
> If you had
>  AL<def> = ...
>  AH<def> = ...
>  ... = AX
> you'd need implicit uses/defs to define AX.

I see. We would need that support if we would spill the value only partially, which we don’t :).

> This sort of thing happens on Hexagon very often: general purpose registers can be paired into 64-bit registers (and used as a whole in 64-bit instructions) and it is not uncommon that the elements of the pair will be defined individually.
> In the above case you'd need something like
>  AL<def> = ..., AX<imp-def>
>  AH<def> = ..., AX<imp-def>, AX<imp-use>
>  ... = AX
> I was trying to replicate a similar situation in the X86 backend to see what it would do.

Sounds hard to reproduce.

> However, this is not needed anymore, because subregister liveness tracking looks very promising in eliminating this problem altogether.  Now, if only the anti-dep problem was fixed, things would look peachy... :)


> -Krzysztof
> -- 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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