[llvm-dev] New intrinsic property IntrOnlyWrite

[Mehdi Amini via llvm-dev]

Hi,

Can you elaborate what is the impact at the IR level?
If the point is just about how you lower for you target, why are you needing an IR level attribute? You backend if free to specialize the lowering for any intrinsic regardless the IR level attributes.

-- 
Mehdi


> On Mar 18, 2016, at 8:16 PM, Nicolai Hähnle via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi,
> 
> I'd like to draw your attention to http://reviews.llvm.org/D18291, in which I propose a new intrinsic property for intrinsics that are lowered to instructions that mayStore, but are neither mayLoad nor hasSideEffects.
> 
> This is relevant for AMDGPU, where we have store instructions that don't operate on pointers. The codegen backend understands these perfectly well as stores, and so we can enable better scheduling decisions than if we forced these instruction to hasSideEffects.
> 
> In a perfect world, we'd be able to model the behavior of these load and store intrinsics via ReadWriteArgMem, but that would require massive changes in how LLVM thinks about memory locations and how to describe them.
> 
> This comparatively minor addition allows us to move forward with decent scheduling in codegen for the time being.
> 
> Cheers,
> Nicolai
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev