[llvm-dev] generate vectorized code

[Rail Shafigulin via llvm-dev]

On Thu, Mar 17, 2016 at 10:10 AM, Rail Shafigulin <rail at esenciatech.com>
wrote:

> On Wed, Mar 16, 2016 at 6:38 PM, Mehdi Amini <mehdi.amini at apple.com>
> wrote:
>
>>
>> On Mar 16, 2016, at 5:38 PM, Rail Shafigulin <rail at esenciatech.com>
>> wrote:
>>
>> On Wed, Mar 16, 2016 at 11:48 AM, Mehdi Amini <mehdi.amini at apple.com>
>> wrote:
>>
>>> Hi Rail,
>>>
>>> Two hints to begin with:
>>>
>>> 1) Makes sure you example is vectorized on X86 for example
>>> 2) Is your target correctly overriding the TTI (declaring the vector
>>> register size for example) so that the vectorizer can kicks-in (see
>>> X86TTIImpl::getRegisterBitWidth for instance). Alternatively you can test
>>> the SLP vectorizer by passing to clang: -mllvm -slp-max-reg-size -mllvm 512
>>>  (I don't see an equivalent option for the loop vectorizer though).
>>>
>>> Well, it sort of worked. I added a getRegisterBitWidth(...) but then I
>> got this error:
>>
>> fatal error: error in backend: Cannot select: 0x5e949a8: v4i32 =
>> BUILD_VECTOR 0x5e91ae8, 0x5e91ae8, 0x5e91ae8, 0x5e91ae8 [ORD=16] [ID=16]
>>   0x5e91ae8: i32 = Constant<0> [ID=5]
>>   0x5e91ae8: i32 = Constant<0> [ID=5]
>>   0x5e91ae8: i32 = Constant<0> [ID=5]
>>   0x5e91ae8: i32 = Constant<0> [ID=5]
>>
>> What am I missing?
>>
>>
>> I means that you have a vectorized IR that reached your backend, but your
>> backend is not ready to deal with all the vector constructs in
>> SelectionDAG.
>> You need to express how to legalize/select the BUILD_VECTOR in
>> SelectionDAG to instructions that your target supports. You can look at
>> what other targets are doing.
>>
>> --
>> Mehdi
>>
>>
I think I understand that I need to implement a LowerBUILD_VECTOR, however
I'm struggling to understand how to do it. I did look at other targets and
I'm not very clear on what they are doing, as I'm not very experience with
LLVM as well as practical compilers (I did take a class in college but as
I'm understanding now, there is a giant difference between theory and
practice) At the moment my target has 3 very simple instructions, vector
add, vector load, and vector store, all of the elements of from the vector
are integers and 32 bits wide. Can someone at least point me in the right
direction on how to start implementing LowerBUILD_VECTOR?

Any help is appreciated.


-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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