[llvm-dev] Loop vectorizer Queires
Jumana Mp via llvm-dev
llvm-dev at lists.llvm.org
Mon Jun 13 15:59:16 PDT 2016
Thanks for your response. I would like to run my code on Xeon phi earlier
version that is KNC.
Well I asked the basic question because of various reasons.
I found that LLVM emits auto vectorized code for MIC with flags -mavx512f
and -mavx512cd. I used clang 3.8 and my vectorized code did not emit any
vector-512 instructions nor zmm registers are used. So I thought, there is
a difference between flags for KNL and KNC. The architecture I have got to
test is KNC. - mcpu=help does not distinguish this(may be I dont
understand) and I got confused.
I think there is a combination of flags that I should use for KNC.
It will be nice to be clarified with this.
On Tue, Jun 14, 2016 at 12:24 AM, C Bergström <cbergstrom at pathscale.com>
> On Tue, Jun 14, 2016 at 6:03 AM, Jumana Mp via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
> > Hello,
> > I have a few issues in vectorizing loops using Clang 3.8.
> > Will it be ok if I shoot some of my findings and queries here?
> > Meanwhile, can I please know if LLVM support autovectorized MIC
> > for Xeon phi?
> > If so, could you please tell me the flags to use?
> > I am Jumana, a masters student in Embedded system working as a graduate
> > research intern with Intel. For my thesis, I am working with
> > auto-vectorizer for various architectures.
> > I have certain issues which I find difficult to explain myself. I tried
> > posting in LLVM forum, but looks like I have no access.
> You're a researcher and intern, but asking basic questions like this?
> "MIC instructions" - are you referring to the AVX512 supported in KNL
> or the pre-cursor to this in KNC? (Which supported a few more and a
> few less instructions than what ended up being AVX512)
> I've seen a bunch of work from @Intel people around here and I'll let
> them comment on more of the specifics about the level of support for
> Intel PHI products.
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