[llvm-dev] Strong compilation scheme of acquire loads to PPC

Ehsan Amiri via llvm-dev llvm-dev at lists.llvm.org
Fri Jun 3 09:28:27 PDT 2016

Hi Jeehoon

I looked at the original code review http://reviews.llvm.org/D5180 and
checked with Bill Schmidt who approved the code change. The only reason
that the improvement was not done in the original commit was lack of time.
Please go ahead with your change. Make sure to add Hal Finkel (PowerPC
Backend maintainer) in your code review.


On Thu, Jun 2, 2016 at 11:16 PM, Jeehoon Kang via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hi everyone,
> I wonder if why acquire loads (atomic accesses) are compiled to PowerPC as
> `load+lwsync`, which is stronger than what is known to be sound:
> `load+ctrl+isync`.  The relevant code section is:
> https://github.com/llvm-mirror/llvm/blob/master/lib/Target/PowerPC/PPCISelLowering.cpp#L8374
> Note that the compiler writers recognized this issue, and there is a
> comment on it in the above code section.  But I would like to know if there
> are more discussions on this issue.  Specifically, I would like to know if
> the current compilation scheme is intentionally used.  Otherwise, I want to
> make a patch that weakens the compilation scheme of acquire loads.
> Thank you,
> Jeehoon
> --
> Jeehoon Kang (Ph.D. student) <http://sf.snu.ac.kr/jeehoon.kang>
> Software Foundations Laboratory <http://sf.snu.ac.kr>
> Seoul National University <http://www.snu.ac.kr>
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