[llvm-dev] Lowering For Loops to use architecture "loop" instruction

[Dilan Manatunga via llvm-dev]

Hi,

I'm working on project which involves writing a backend for a hypothetical
architecture. I am currently trying to figure out the best way to translate
for loops to use a specialized "loop" instruction the architecture
supports. The instruction is similar X86's loop instruction, where a
register is automatically decremented and the condition is automatically
checked to see if loop execution should continue.

I was wondering what is the best way to go about implementing this. I tried
looking to see how X86 implemented their loop instruction, but couldn't
really find where the IR instructions were being lowered to the loop
instruction.

It seems like there is no way to really express this loop instruction in a
pattern, since the loop instruction depends on a set of instructions that
occur in different locations (induction variable initialization, the
condition calculation, and the branch).

Right now, I thought of using the loop pass to somehow mark the
instructions that should be lowered to a loop instruction, and translating
them in the selection phase, but I'm not entirely sure how to do that or if
that is even the right strategy.

Thanks,
-Dilan Manatunga
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