[llvm-dev] X86ISelLowering: Promote 'add nsw' to a wider type

Artur Pilipenko via llvm-dev llvm-dev at lists.llvm.org
Tue Jul 19 09:08:04 PDT 2016

I’m looking a a case very similar to the one in the bug you mentioned. The only difference is that we don’t rely on LLVM index i64 canonicalization (done by sign extension) but instead our front end does it using zero extension because it knows that in our case indices can’t be negative. So, the resulting IR is virtually the same except sexts are replaced by zexts.

I haven’t yet filed any bugs for that.


On 19 Jul 2016, at 18:54, Sanjay Patel <spatel at rotateright.com<mailto:spatel at rotateright.com>> wrote:

Hi Artur -

I don't think there's any reason to limit the transform to sexts only; that's just the case that was apparent in https://llvm.org/bugs/show_bug.cgi?id=20134 , so I limited it to that pattern.

It's probably worth noting that I'm currently fighting through casts of all kinds in IR (InstCombine) rather than the backend:

I'm very interested to see what kinds of patterns you're seeing and want to optimize. It's possible that IR transforms could eliminate the need for the backend fixups...or it could make them harder. Are there bug reports for the cases that you are looking at?

On Tue, Jul 19, 2016 at 9:13 AM, Artur Pilipenko <apilipenko at azulsystems.com<mailto:apilipenko at azulsystems.com>> wrote:
Hi Sanjay,

Some time ago you implemented a sext(add_nsw(x, C)) --> add(sext(x), C_sext) transformation in X86ISelLowering
Is there any reason why this transformation is limited to sexts and doesn’t support zexts?


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