[llvm-dev] Experimental 6502 backend; memory operand folding problem

Krzysztof Parzyszek via llvm-dev llvm-dev at lists.llvm.org
Fri Feb 12 05:54:16 PST 2016

On 2/12/2016 7:23 AM, Bruce Hoult via llvm-dev wrote:
> I haven't seen what you are doing, but if I was writing a back end for
> the 6502, I'd lie to LLVM and describe RAM page 0 as being the real
> registers, and A, X and Y as being special purpose registers used for
> temporaries.

How did you get the "(z), x" and "(z, y)" addressing modes to work with 
this scheme?  The "z" is two adjacent zero-page bytes---did you model 
16-bit registers as all possible pairs of adjacent 0p addresses?


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