[llvm-dev] Specs on TableGen Instruction fields: pattern, ins and outs

[Krzysztof Parzyszek via llvm-dev]

Hi Alex,
Both "ins" and "outs" are DAGs (in tablegen's terminology). These are 
lists of inputs and outputs with specific types or with register classes 
assigned to them. The patterns are also DAGs, but more complex.  Each 
node in the DAG has a set of types associated with it (from the source 
representation in the .td file) and those sets are then reduced to match 
the constraints from the instructions (i.e. the ins and outs), 
SDTypeConstraints, etc. At the end, a matching code is generated that 
enforces the required types for each tree node.

I am not aware of any academic paper about it. The type system used in 
tablegen is not overly complicated.  Most of it is implemented in 
utils/TableGen/CodeGenDAGPatterns.cpp.

-Krzysztof

On 12/19/2016 5:44 PM, Alex Susu via llvm-dev wrote:
>   Hello.
>     Are you aware of any document (preferably academic paper) describing
> TableGen's typing of the following fields used to describe Instruction:
> pattern, ins and outs.
>     I found a few pages on TableGen, but none of them talking about
> these fields:
>       http://llvm.org/docs/TableGen/LangRef.html
>       http://llvm.org/docs/TableGen/LangIntro.html
>       http://llvm.org/docs/TableGen/index.html
>       http://llvm.org/docs/TableGen/BackEnds.html
>       http://llvm.org/docs/CodeGenerator.html)
>
>     Although not (really) about TableGen, I found a good paper talking
> about the instruction selection in LLVM:
> http://llvm.org/pubs/2008-CGO-DagISel.pdf .
>
>   Thank you,
>     Alex
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