[llvm-dev] AtomicExpandPass and branch weighting

James Y Knight via llvm-dev llvm-dev at lists.llvm.org
Wed Dec 14 15:15:44 PST 2016


On Wed, Dec 14, 2016 at 5:12 PM, Kyle Butt <iteratee at google.com> wrote:

>
>
> On Wed, Dec 14, 2016 at 1:34 PM, James Knight <jyknight at google.com> wrote:
>
>> Seems reasonable.
>>
>> I'd note additionally that on some architectures, that the success block
>> *must* be the fallthrough case (that is to say: you must not have any taken
>> branches between the load-linked and store-conditional) in order to have an
>> architectural guarantee that two such loops on different CPUs won't
>> livelock against eachother.
>>
>
> Do we have a way to *require* that 2 blocks be laid out consecutively? I
> don't think that we do. A hint is better than nothing, but not a guarantee.
>

Not as far as I know. (Of course, we also ought to be requiring that
there's no extraneous loads/stores between the ll/sc, which we also cannot
do, especially across basic blocks, but also need to do.)

I mostly mentioned that as a B.T.W. :)
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