[llvm-dev] Why does new llvm-as reject old IR format?

[Madhur Amilkanthwar via llvm-dev]

Hi all,
I have the below input

define i32 @myCas(i32* %ptr, i32 %cmp, i32 %val) #0 {
entry:
  %0 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %val seq_cst
  %1 = extractvalue { i32, i1 } %0, 0
  ret i32 %1
}

When I provide this input file to llvm-as 3.6 I get the error

a.ll: error: Expected ordering on atomic instruction
  %1 = extractvalue { i32, i1 } %0, 0

This is because instruction syntax of cmpxchg has changed since 3.2
requiring failing order as well.

Ideally, I would expect backward compatibility from LLVM tools; and not
requiring to modify the code again.

What is LLVM's philosophy here?



-- 
*Disclaimer: Views, concerns, thoughts, questions, ideas expressed in this
mail are of my own and my employer has no take in it. *
Thank You.
Madhur D. Amilkanthwar
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