[llvm-dev] enabling interleaved access loop vectorization

Renato Golin via llvm-dev llvm-dev at lists.llvm.org
Fri Aug 5 14:03:07 PDT 2016

On 5 August 2016 at 21:00, Demikhovsky, Elena
<elena.demikhovsky at intel.com> wrote:
> As far as I remember, may be I’m wrong, vectorizer does not generate
> shuffles for interleave access. It generates a bunch of extracts and inserts
> that ought to be coupled into shuffles after wise.

That's my understanding as well.

Whatever strategy we take, it will be a mix of telling the cost model
to avoid some pathological cases as well as improving the detection of
the patterns in the x86 back-end.

The work to benchmark this properly looks harder than enabling the
right flags and patterns. :)


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