[llvm-dev] Remove zext-unfolding from InstCombine

Sanjay Patel via llvm-dev llvm-dev at lists.llvm.org
Thu Aug 4 17:14:09 PDT 2016


On Thu, Aug 4, 2016 at 5:21 PM, Matthias Reisinger <
matthias.j.reisinger at gmail.com> wrote:

> … InstCombine will now eventually get to:
>
> define i8 @zext_or_icmp_icmp(i8 %a, i8 %b) {
>   %1 = icmp ne i8 %b, 0
>   %2 = zext i1 %1 to i8
>   %zext.demorgan = and i8 %2, %a
>   %zext = xor i8 %zext.demorgan, 1
>   ret i8 %zext
> }
>
> just what we wanted :)
>

Great!


> The only problem that I am currently facing is symmetry: when we replace
> `%or = or i8 %xor, %zext ` by `%or = or i8 %zext, %xor` in the above `foo`
> the patterns obviously won’t trigger anymore. So to handle `(A ^ 1) |
> zext(B == 0)` and ` zext(B == 0) | (A ^ 1)` in a uniform way we may need
> another transform. Is it feasible, for example, to introduce a
> canonicalization that moves a cast always to the right-hand side of a
> binary operation?
>

This is a general problem for any pattern matching of commutative
operators. Search for "matchSelectFromAndOr" to see a particularly bad
example. :)

In theory, we should be able to use "value complexity" in this situation,
but it's broken:
https://llvm.org/bugs/show_bug.cgi?id=28296

So either we need to fix that or we'll have to include extra patterns to
match the commuted possibilities.


>
> > We may need to answer this question first though:
> >  define i8 @notLowBit(i8 %a) {
> >   %lowBit = and i8 %a, 1
> >   %not = xor i8 %lowBit, 1
> >   ret i8 %not
> > }
> >
> > Should this be canonicalized to:
> > define i8 @notLowBit(i8 %a) {
> >   %not = xor i8 %a, -1
> >   %lowBit = and i8 %not, 1
> >   ret i8 %lowBit
> > }
> >
> > ...because xor with -1 is the canonical 'not' operation?
>
> Do we need such a canonicalization in the presence of the above patterns?
>

This one is interesting. When I wrote the example, I didn't realize that we
actually have the inverse canonicalization: the 2nd case is always
transformed to the 1st because it reduces the demanded bits of the
constant. However, there is a FIXME comment about that in
SimplifyDemandedUseBits:

    // FIXME: for XOR, we prefer to force bits to 1 if they will make a -1.

So either we fix that and adjust the patterns that you are about to add
or...

Welcome to InstCombine. :)
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160804/d61a0533/attachment.html>


More information about the llvm-dev mailing list