[llvm-dev] Prologue and epilogue for vectorized code
Alex Susu via llvm-dev
llvm-dev at lists.llvm.org
Wed Apr 27 15:46:56 PDT 2016
I'd like to generate a sort of prologue+epilogue for a code block running on a SIMD
architecture obtained from the LLVM loop vectorizer. My SIMD processor receives data from
the CPU via DMA transfer and sends it via DMA transfer or a FIFO.
It is exactly for these transfers that I need to write the prologue+epilogue -
relatively simple, e.g. a call to a function like TransferViaDMA().
Although it doesn't seem to be very difficult, I'm curious what is the best way to do it.
I haven't found anybody to write prologue+epilogue for vector code (obtained from the
loop vectorizer), and although it shouldn't be very different from the prologue+epilogue
for function call, I'm still curious what's the best way to do it.
Please let me know what do you recommend.
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