[llvm-dev] How to get started with instruction scheduling? Advice needed.

[Phil Tomson via llvm-dev]

I need to add instruction scheduling for a new target which is a fairly
simple in-order execution machine.

I've been watching this presentation from a 2014 LLVM dev meeting as it
seems relevant:
"SchedMachineModel: Adding and Optimizing a Subtarget"
http://llvm.org/devmtg/2014-10/Slides/Estes-MISchedulerTutorial.pdf

In this presentation the author says that there have been several ways to
approach scheduling in LLVM over the years:


   - Pre 2008: SelectionDAGISel pass creates the ScheduleDAG from the
   SelectionDAG at the end of instruction selection
   - ScheduleDAG works on SelectionDAG Nodes (SDNodes)
   - Circa 2008: Post Register
   Allocation pass added for
   instruction selection ( SchedulePostRATDList
   works on MachineInstrs)
   - Circa 2012: MIScheduler
   (ScheduleDAGMI) added as
   separate pass for pre-RA
   scheduling
   - Circa 2014: MIScheduler
   adapted to optionally replace
   PostRA Scheduler

In the presentation he goes with defining a subclass of SchedMachineModel
in the schedule .td file. And apparently with this approach there are no
instruction itineraries.

So I'm wondering: what's the current recommended way to approach this and
does it depend on the type or target? (in-order, superscalar, out of order,
VLIW...)?

Someone earlier started to define instruction itineraries for our target.
Should I continue down this road or move over to the SchedMachineModel
approach? Are there other recommended presentations/documents that I should
be looking at?


Thanks.

Phil
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