[llvm-dev] (implicit SR) v. Defs = [SR] ?

[Peter Lawrence via llvm-dev]

in a ".td" file
what is the difference between saying
                (implicit FLAGS)
in an instruction definition's pattern, verses saying
                Defs = [FLAGS];
in an instruction definition


one might conclude that since not all machines that have condition codes use "implicit"
that "implicit" is redundant, is this true ?


TIA,
-Peter Lawrence.
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