[llvm-dev] multiply-accumulate instruction

[James Y Knight via llvm-dev]

Do you only want to define assembler syntax for this, or do you need to be
able to be able to automatically emit it from some higher level construct?
I'd expect the former would be entirely sufficient, in which case this
should be sufficient:

let Predicates = [HasLeon3, HasLeon4], Defs = [Y, ASR18], Uses = [Y, ASR18]
in

def SMACrr :  F3_1<3, 0b111110,

                (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),

                 "smac $rs1, $rs2, $rd",

                 []>;


If you want the latter, I'm not sure how you'd go about being able to
pattern-match it, because of the unusual 40 bit accumulate input and
output, and the unusual for sparc 16-bit inputs. Hopefully you don't really
need that. :)

On Fri, Sep 18, 2015 at 10:19 AM, Chris.Dewhurst via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> I’m trying to define a multiply-accumulate instruction for the LEON
> processor, a Subtarget of the Sparc target.
>
>
>
> The documentation for the processor is as follows:
>
>
>
> ===
>
> To accelerate DSP algorithms, two multiply&accumulate instructions are
> implemented: UMAC and SMAC. The UMAC performs an unsigned 16-bit multiply,
> producing a 32-bit result, and adds the result to a 40-bit accumulator made
> up by the 8 lsb bits from the %y register and the %asr18 register. The
> least significant 32 bits are also written to the destination register.
> SMAC works similarly but performs signed multiply and accumulate. The MAC
> instructions execute in one clock but have two clocks latency, meaning that
> one pipeline stall cycle will be inserted if the following instruction uses
> the destination register of the MAC as a source operand.
>
>
>
> Assembler syntax:
>
>     smac rs1, reg_imm, rd
>
>
>
> Operation:
>
>     prod[31:0] = rs1[15:0] * reg_imm[15:0]
>
>     result[39:0] = (Y[7:0] & %asr18[31:0]) + prod[31:0]
>
>     (Y[7:0] & %asr18[31:0]) = result[39:0]
>
>     rd = result[31:0]
>
>
>
> %asr18 can be read and written using the rdasr and wrasr instructions.
>
> ===
>
>
>
> I have the following in SparcInstrInfo to define the lowering rules for
> this instruction, but I feel that this isn’t likely to work as I need to
> somehow tie together the fact that %Y, %ASR18 and %rd are all related to
> each other in the output.
>
>
>
> let Predicates = [HasLeon3, HasLeon4], Defs = [Y, ASR18], Uses = [Y,
> ASR18] in
>
> def SMACrr :  F3_1<3, 0b111110,
>
>                 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2,
> ASRRegs:$asr18),
>
>                  "smac $rs1, $rs2, $rd",
>
>                  [(set i32:$rd,
>
>                      (add i32:$asr18, (mul i32:$rs1, i32:$rs2)))] >;
>
>
>
> Perhaps a well-chosen “let Constraints=” might be used here? If so, I’m
> not sure I know what to put in there. If not, can anyone help me how I
> might define the lowering rules for this instruction please?
>
>
>
> Chris Dewhurst, University of Limerick.
>
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>
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