[llvm-dev] MCRegisterClass mandatory vs preferred alignment?

[David Chisnall via llvm-dev]

On 31 Aug 2015, at 23:21, Philip Reames via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Looking around today, it appears that TargetRegisterClass and MCRegisterClass only includes a single alignment.  This is documented as being the minimum legal alignment, but it appears to often be greater than this in practice.  For instance, on x86 the alignment of %ymm0 is listed as 32, not 1.  Does anyone know why this is?
> 
> Additionally, where are these alignments actually defined?  I don't seem them appearing in the X86RegisterInfo.td files as I would naively expect.
> 
> The background for my question is that I'm looking into adding a function attribute which uses unaligned loads and stores for register spilling on x86 to avoid the need for dynamic frame realignment.  (see the previous thread "Aligned vector spills and variably sized stack frames")  The key difference w.r.t. to the existing "no-realign-stack" attribute is that situations which *require* a stack realignment will generate a fatal_error rather than silently miscompiling.  The current mechanism works by essentially ignoring the alignment criteria and just hoping everything works out in practice.

The alignment is a property of the register as a side-effect of conflating three things:

- Registers
- Types
- Load and store operations

A register, intrinsically, should have no alignment - alignment is solely a property of values in memory and therefore should be a property of instructions.  Currently, there’s no infrastructure for providing different load and store instructions with different alignment requirements (other than writing a custom pass).

There was some work about a year ago to try to deconflate these things, but I don’t think it ever made it into the tree.

David