[llvm-dev] DFAPacketizer assert failure
Rail Shafigulin via llvm-dev
llvm-dev at lists.llvm.org
Thu Nov 19 16:55:07 PST 2015
In the Hexagon backend we originally treated CFI instructions as "solo",
> i.e. they could not be packetized with any other instruction. Now we
> simply delay the generation of these instructions until after
> packetization. The reason for this is that two instructions that could be
> packetized together were not packetized together if there was an CFI
> instruction in between. This was causing different code to be generated
> with the CFI instructions present.
How do you delay the generation of the CFI instructions? I'm having the
same problem as you had. They really mess up my packets. I'd really
appreciate if you could point me to the code that shows where delayed
generation of CFI instructions occurs.
Thanks,
--
R
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151119/9ff363d2/attachment.html>
More information about the llvm-dev
mailing list