[LLVMdev] [RFC] Project for GSoC: Unit/Regression testing for CodeGen

[Hal Finkel]

Hi everyone,

In response to yet-another fix in CodeGen affecting only an out-of-tree target (r231186), our lack of the ability to properly unit test CodeGen components has been highlighted. It was suggested that improving this situation might be a good GSoC project, and I agree, provided that we can settle on the scope and basic design ahead of time.

I'd like to add that I feel this is a serious problem even for in-tree targets. We currently construct IR-level tests for CodeGen components, but
this is very fragile. Many of the IR-level CodeGen tests, especially "bug-triggering" regression tests, don't currently test the logic they were originally designed to cover.

Now, for a design:

One idea that I've had for some time is to develop a 'mock' target for testing. For this target, all of the various type/operation legality settings would be determined by some input configuration file. It would contain instructions, mostly in 1:1 correspondence to our SelectionDAG node types, and many different register classes of different sizes, different calling-conventions, etc. (again, some input configuration file would determine which were active). We could then use this mock target to right regression tests for CodeGen components. We could also use it write units tests, especially at the MI level.

Thoughts?

 -Hal

-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory