[LLVMdev] ReduceLoadWidth, DAGCombiner and non 8bit loads/extloads question.
kparzysz at codeaurora.org
Thu Mar 5 11:28:02 PST 2015
On 3/3/2015 3:32 PM, Ryan Taylor wrote:
> It looks like shouldReduceLoadWidth is the best solution, since we
> can create override and just return false if the new size is 8, this
> should avoid generating LD1 in this case. I'm also seeing LD1 being
> generated by other opt functions in DAGCombiner, so I'm not sure this is
> a full solution for us, unless they are also generating LD1 via
> ReduceLoadWidth, I'm not sure yet.
> Though we are not yet using the version of LLVM that has the
> shouldReduceLoadWidth virtual function.
The load width reduction also happens in TargetLowering::SimplifySetCC,
but for some reason is not guarded by the hook.
We had a similar problem in the Hexagon backend (but for a different
reason) and we had to disable the shortening of loads in both places.
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