[LLVMdev] Extending Vector GEP - proposal

dag at cray.com dag at cray.com
Tue Mar 3 12:36:41 PST 2015

"Demikhovsky, Elena" <elena.demikhovsky at intel.com> writes:

> I should generate 2 (or more, for each splat element) redundant
> instructions (broadcast is insert+shuffle), hoist them outside the
> loop on some stage. Then look for them on CodeGenPreare pass, sink
> them back and rebuild the CFG.

I agree with Elena.  These are common operations and ought to be
directly representable in the IR.  Hoisting and sinking have been
constant pain points for us for exactly the reason described.  Getting
the sinking right isn't trivial.  It's not especially hard but it's
extra work that supporting the operations actually desired in the IR
would eliminate.


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