[LLVMdev] ARM unwinding bug

Ben Pye ben at curlybracket.co.uk
Wed Jul 29 14:20:14 PDT 2015


> Yes, so, that's yet another missing info. Which ARM? RaspberyPi,
> although popular, is a very old and somewhat deprecated architecture
> (ARMv6). Most people work on ARMv7 and ARMv8 nowadays, so if you can't
> reproduce the bugs on those, you'll have a hard time finding people to
> help you.

> Also, Clang 3.6 is not that old, but we don't really provide
> maintenance to non-trunk versions of the compiler, so if you want a
> bug looked into, you need to reproduce it in trunk. If you can't, than
> the problem is fixed, and you either wait for the new release to come
> out, or build your own from trunk.

Not sure if you got the other message, I think I managed to split the topic
as I wasn't subscribed to receive the previous message. This error has been
on the Raspberry Pi 2, so that's a Cortex A7 I believe, certainly ARMv7. I
haven't yet built trunk as on the device I run out of memory and do not
have enough disk space to allocate a large enough swap space, and it's too
slow to wait for it to fail, so I'd have to cross compile which is not
something I have yet attempted, unfortunately LLVM/Clang only provides
AMD64 packages for nightly builds, despite building it for a vast matrix.

I don't believe this to be an unwinder bug, but a generation bug (of the
unwind information). I do find the crash you experience curious, but it's
not something I have had occur here. Unfortunately I can't say I have great
experience with the ARM unwind information, but really got to that
conclusion by eliminating libunwind as GCC does generate unwind information
that results in PC being restored.

> I'll update the bug with some more info, but you need to reproduce it
> in trunk and in a hardware that I have access to. RPI is just not
> relevant enough for me, that I don't even have one. Perhaps I should
> buy one...

I think you could reproduce this on scaleway.io 's hosted service, which
offer a free month, but I'd be happy to provide access to something if
that's what it took. As I said though, RPi 2 should be a pretty vanilla
Cortex A7 core.

Ben.
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