[LLVMdev] SPMD Autovectorizer

Renato Golin renato.golin at linaro.org
Thu Jul 9 02:47:26 PDT 2015


On 7 July 2015 at 22:23, Pekka Jääskeläinen <pekka.jaaskelainen at tut.fi> wrote:
> Yes, this can be done with (selective) scalarization or
> with a vector-variable aware vectorizer. AFAIK,
> there's already a Scalarizer pass in upstream LLVM for this.

There is, I was just wondering how much work would it be to get our
main vectorizers to be vector-variable aware, or if it is really worth
pursuing that.


> Instead of implementing a monolithic SPMD-specific kernel vectorizer
> with lots of code duplication to simple loop vectorizers, what pocl
> does is quite the opposite. All it does is identify the
> parallel regions between barriers, marks them as parallel loops and
> let the other passes do what they like with the loops.

Ah! Excellent!


> I'm not sure what you mean by "OMP+SIMD" model. I was simply
> proposing using the existing parallel loop MD like pocl does
> to keep the pass responsibilities organized.

My question is if OMP+SIMD MD would help pocl to identify kernels and
vectorisable areas, but it seems you already have that in place.



> What I suggested was to consider upstreaming a part of the pocl compiler (or
> preferably an improved implementation of it) that
> statically identifies the parallel regions and generates a new
> function that wraps the parallel regions in parallel loops
> (which are then vectorized or whatever is best for the target
> at hand by other passes, to keep the chain modular).

Is this an IR pass? I think that'd be interesting...


> From the IR, I think it by minimum needs a notion of a "barrier instruction"
> using which it can do its CFG analysis to identify the regions.  We simply
> use a dummy function declaration for this now.

As usual, ok.

Maybe we should discuss a builtin with the larger community. Probably
best if in a different thread, as this one's stale. :)

cheers,
--renato




More information about the llvm-dev mailing list