[LLVMdev] LLVM register number for MIPS DAGToDAG

Ambuj Agrawal ambujbwt at gmail.com
Sat Feb 28 08:32:30 PST 2015


Thanks for your reply Quentin. I do understand that the registers are
allocated much later in the pipeline.
I am assuming that the physical registers are allocated before
MipsAsmPrinter class.
I am doing something like
  if (MI->getOpcode() == Mips::OPCODE) {
        unsigned n = MI->getNumOperands();
        for(unsigned i=0 ; i < n ; i++) {
            const MachineOperand &MO = MI->getOperand(i);
            if (MO.isReg())
            {
                fprintf(stderr,"int i is %u and reg is %d\n",i,
MO.getReg());
            }
        }
  }

but I am still getting wrong physical register number.

For eg when the allocated register is 3 in assembly the output given by
MO.getReg() is 290.

Any clues why is this the case?

Thanks,
Ambuj

On Fri, Feb 27, 2015 at 5:46 PM, Quentin Colombet <qcolombet at apple.com>
wrote:

>
> > On Feb 27, 2015, at 1:59 AM, Ambuj Agrawal <ambujbwt at gmail.com> wrote:
> >
> > Is it possible to get a register number to which the value is allocated
> to in MIPS in DAGToDAG class?
> >
> > More Specifically:
> >                     SDValue Reg3 = Node->getOperand(3);
> >                     if (RegisterSDNode *R =
> dyn_cast<RegisterSDNode>(Reg3))
> >                     {
> >                         op3 = cast<RegisterSDNode>(Reg3)->getReg();
> >                         fprintf(stderr,"Op3 is register and regnum is
> %d\n",op3);
> >                     }
> >                     else if (ConstantSDNode *C =
> dyn_cast<ConstantSDNode>(Reg3))
> >                     {
> >                         op3 = C->getZExtValue();
> >                         fprintf(stderr,"Op3 is constant and value is
> %d\n",op3);
> >                     }
> >
> > When I run this code Reg3 is found out to be a ConstantSDNode but is
> stored in the register in assembly. I want to store the value in register
> but also need the register number to which the value is allocated.
>
> The registers are allocated much later in the pipeline. At this stage,
> these are virtual registers.
>
> What are you trying to achieved?
>
> Cheers,
> -Quentin
>
> >
> > Thanks,
> > Ambuj Agrawal
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
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