[LLVMdev] half to float intrinsic promotion

[Ahmed Bougacha]

On Thu, Feb 12, 2015 at 8:48 AM, kewuzhang <kewu.zhang at amd.com> wrote:
>
> Hi Guys,
>
> I am trying to promote half to float for my intrinsic math operations,
> following class and pattern  are defined.
>
> "
> class  S_HF__HF< string asmstr> : Intrinsic
>         <[llvm_float_ty  ],  [llvm_float_ty  ],
> [IntrNoMem],
> !strconcat(asmstr,    "_f16")>;
>
> def :Pat<( f16 (int_my_math_f16 f16:$src)), (F2Hsr (FEXTsr f16:$src) )>;
>
>
> “
> where FEXTsr is implementing the fextend type profile,   F2Hsr is
> implementing as the  float to half conversion .
> “int_my_math_f16”  is implementing the “S_HF__HF” profile above.
> I am just trying to
> (1) convert the $src from f16 to f32 using FEXTsr.
> (2) use the F2Hsr to convert the f32 back to f16.
> for testing.
> however, I always got the error
> ”
> Type inference contradiction found, merging 'f32' into 'f16'
> def :Pat<( f16 (int_my_math_f16 f16:$src)), (F_2_F16sr (FEXTsr f16:$src) )>;
>
> “
>
>
> Wondering what is the reason? I noticed that LLVM does not have the
> intrinsic type “LLVM_f16_ty”, so I always use “LLVM_float_ty” for it as long
> as it is a float or half.

Hi Kevin,

In "llvm_float_ty", "float" means f32 (as in the IR language
reference, and as defined in include/llvm/IR/Intrinsics.td).  So in
your example, TableGen complains because you're feeding an f16 to an
intrinsic declared as taking an f32.

However, there's also "llvm_half_ty" in Intrinsics.td, corresponding
to f16; why not use that instead?

-Ahmed

> best
>
> Kevin
>
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