[LLVMdev] RFC: Native Windows C++ exception handling

Reid Kleckner rnk at google.com
Wed Feb 11 14:09:10 PST 2015


On Wed, Feb 11, 2015 at 1:57 PM, Joseph Tremoulet <jotrem at microsoft.com>
wrote:

>  Ah, ok.  So if the outliner sees non-dispatch code in the landing pad
> area, it can find/create somewhere to put it and an appropriate eh.actions
> annotation to get an EH table generated that will ensure it gets executed
> appropriately at run-time (in this example, perform the add before invoking
> either handler); is that more or less the idea?  That makes sense, thanks.
>

Yep. In the worst case, we could model code before landing pad dispatch as
a cleanup handler, but I think the most common transforms are easily
undone. Consider your example where a + b gets hoisted before the catch
dispatch. Adds have no side effects, so we can freely sink them back down
into the catch handler once we start outlining.

Things that are hard to move, like loads and stores to unknown memory
locations, cannot be hoisted over the llvm.eh.begincatch() call in the
first place. It should act as a memory barrier.


> I have the same question about the post-outlining IR.  To change the
> example to one where the bait won't get outlined, suppose you had
>
>
>
> int foo(int a, int b) {
>
>   try {
>
>     try {
>
>       maybe_throw();
>
>       return 0;
>
>     } catch (int) {
>
>       // some code here that gets outlined
>
>     }
>
>     L1:
>
>     return a + b;
>
>   } catch (float) {
>
>     // some other code here that also gets outlined
>
>   }
>
>   L2:
>
>   return (a + b) + 1;
>
> }
>
>
>
> and suppose that nothing gets moved around before outlining.  Then, after
> outlining, the landingpad will be followed by an eh.actions call and then
> an indirect branch that targets L1 and L2, correct?
>
>
>
> Do we need to worry that a late codesize optimization might want to merge
> the adds by hoisting them up above the indirect branch? If that happened,
> wouldn't it get skipped over if an exception were raised?
>

We'd have to hoist a + b to somewhere that dominates L1 and L2. I think the
only BB in your program that dominates is the entry block. In the IR, the
fake 'indirectbr' instruction after the call to @llvm.eh.actions helps keep
the CFG conservatively correct.
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