[LLVMdev] aarch64 status for generating SIMD instructions

[Ralph Campbell]

So far, all I have tried is -O3 and with & without "-mcpu=cortex-a57".
I'm new to LLVM so I'm not familiar with what optimization flags are available.
I tried poking around in the LLVM documentation but haven't found a definitive list.
The clang man page is skimpy on details.

From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com]
Sent: Monday, February 09, 2015 2:11 PM
To: Ralph Campbell
Cc: llvmdev at cs.uiuc.edu
Subject: RE: aarch64 status for generating SIMD instructions

Which compiler flags have you been using ?

There is definitely support for AArch64's SIMD instructions, but their use depends on what the vectorizers can do with your code.

From: llvmdev-bounces at cs.uiuc.edu<mailto:llvmdev-bounces at cs.uiuc.edu> [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Ralph Campbell
Sent: 09 February 2015 22:30
To: llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu>
Subject: [LLVMdev] aarch64 status for generating SIMD instructions

I'm using Fedora 22 and gcc 4.9.2 to run llvm 3.5.1 on an ARM Juno reference box (cortex A53 & A57).
I tried compiling some simple functions like dot product and axpy() into assembly to see if any of the SIMD instructions were generated (they weren't).
Perhaps I'm missing some compiler flag to enable it.

Does anyone know what the status is for aarch64 generating SIMD instructions?
Anyone coordinating or leading this effort? (if there is one)
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