[LLVMdev] type legalization/operation action

Matt Arsenault Matthew.Arsenault at amd.com
Thu Feb 5 14:37:56 PST 2015


On 02/05/2015 01:56 PM, kewuzhang wrote:
> Dear there,
>
> I have a target which is supporting the  32 bit operations natively. Right now,I want to make it support the 16 bits operations as well.
> My initial thought is:
Why do you need to do this? If you don't report having a 16-bit register 
type, all 16-bit operations should be appropriately promoted to 32-bit 
automatically?

-Matt

> (1)
> I can adding something like “ CCIfType< [i16], CCPromoteToType<i32>>”, to the CallingConv.td, then “all” the 16 bits operands will be automatically promoted to 32 bits, it will be all set.
> but looks it is not the case.
>
> (2)
> Then I tried adding something like “ setOperationAction(ISD::ADD,  MVT::i16, Promote)” to the IselLowering,  it still failed to  select the (i16 + i16)..
>
> wondering which part I missed?
>
> best
>
> Kevin
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