[llvm-dev] Allowing virtual registers after register allocation

[Derek Schuff via llvm-dev]

Hi all,
Virtual ISAs such as WebAssembly and NVPTX use infinite virtual register
sets instead of traditional phsyical registers. PrologEpilogInserter is run
after register allocation and asserts that all virtuals have been allocated
but doesn't otherwise depend on this if scavenging is not needed. We'd like
to use the target-independent PEI code for WebAssembly, so we're proposing
a TargetRegisterInfo hook for targets to indicate that they use virtual
registers in this way (currently called usesVirtualRegstersAfterRegAlloc(),
other suggestions welcome). The code is athttp://reviews.llvm.org/D15394 and
an example of the intended use for WebAssembly is at
http://reviews.llvm.org/D15344 .

The actual change to PrologEpilogInserter itself is quite minimal, but we
thought we'd ask a wider audience for feedback since it's a
target-independent change. For WebAssembly we would implement prolog/epilog
insertion and FrameIndex elimination but most of the rest of the PEI code
(dealing with callee-saved registers, scavenging) does nothing.

For other reference the NVPTX backend currently disables the
PrologEpilogInserter pass but has its own pass which is just a copy
(inevitably slightly out-of-date) of PEI with the irrelevant bits just
deleted; it could probably be updated to use this mechanism too.

Any comments?
Thanks,
-Derek
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