[LLVMdev] How doesn't llvm generate IR for logical negate operation

Bruce Hoult bruce at hoult.org
Fri Apr 10 18:48:56 PDT 2015


I suppose that depends on your CPU.  Do you even have a CPU that supports
operations on <N x i1> as packed bits in vector registers?


On Sat, Apr 11, 2015 at 12:43 PM, zhi chen <zchenhn at gmail.com> wrote:

> Yes, but my point is that there would be some overhead to do cast the <N x
> i1> vectortype to an integerNty. Is there any good way to check not all of
> these N bits in the vectortype are 0s?
>
> On Fri, Apr 10, 2015 at 5:37 PM, Bruce Hoult <bruce at hoult.org> wrote:
>
>> Sure, if you actually just want an i1 saying whether or not at least one
>> bit is set to 1, then comparing against 0 is the right thing.
>>
>> That should end up generating a unary TST instruction on ISAs that have
>> one.
>>
>> On Sat, Apr 11, 2015 at 12:29 PM, zhi chen <zchenhn at gmail.com> wrote:
>>
>>> Thanks, Bruce. So, what is the easiest way to check if there is any bit
>>> set to 1 in a <N x i1> vector type? I used bitcast instruction to cast it
>>> into "iN" first and them compare iN to 0. Do you have a better way to do
>>> it? Thanks again.
>>>
>>> On Fri, Apr 10, 2015 at 5:22 PM, Bruce Hoult <bruce at hoult.org> wrote:
>>>
>>>> LLVM doesn't have a "logical neg" (or "not") operator. That's a C
>>>> thing. Do a compare against 0 to create an i1 result, then zero extend the
>>>> i1 to the size of integer result you want.
>>>>
>>>>
>>>> On Sat, Apr 11, 2015 at 12:07 PM, zhi chen <zchenhn at gmail.com> wrote:
>>>>
>>>>> How can I generate LLVM IR for both logical NEG (!)? For example, if I
>>>>> have Int32Ty a,
>>>>>
>>>>> For the bitwise NEG(~):
>>>>>
>>>>> c = ~a ;
>>>>>
>>>>> I can use the following API from LLVM:
>>>>>
>>>>> BinaryOperator *neg = BinaryOperator::CreateNeg(nbits, "bitwiseNEG", insertBefore);
>>>>>
>>>>> How, if I want to generate logical NEG:
>>>>>
>>>>> c = !a;
>>>>>
>>>>> what should I do for this?
>>>>>
>>>>> Thanks
>>>>>
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>>>>>
>>>>
>>>
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>>
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