[LLVMdev] Need guidance regarding MachineFunctionPass
jtcriswel at gmail.com
Thu Oct 2 14:37:15 PDT 2014
Your description of the problem contains too few details; no one will be
able to diagnose the problem you're having. You need to provide more
information on what, exactly, is not working as you expected.
On 10/2/14, 5:11 PM, sachin arora wrote:
> I am writing a MachineFunctionPass that inspects the generated machine
> code, and examines each opcode and its corresponding operands. If the
> 'instruction + operands' match a particular sequence, then the pass
> should replace them with a fixed instruction + operands sequence. I
> tried using MachineInstr's getOpcode and getOperand functions but the
> pass didn't work as expected.
> Kindly tell me how to proceed or point to appropriate references.
> Thank you !
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
Department of Computer Science, University of Rochester
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